|本期目录/Table of Contents|

[1]赵志伟,张跃军*,李 林.基于互连线电容耦合的SR锁存电路研究[J].宁波大学学报(理工版),2020,33(3):50-56.
 ZHAO Zhiwei,ZHANG Yuejun*,LI Lin.Research on SR latch circuit based on interconnected coupling capacitor[J].Journal of Ningbo University(Natural Science & Engineering Edition),2020,33(3):50-56.
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基于互连线电容耦合的SR锁存电路研究(PDF)
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《宁波大学学报》(理工版)[ISSN:1001-5132/CN:33-1134/N]

卷:
第33卷
期数:
2020年3期
页码:
50-56
栏目:
出版日期:
2020-05-10

文章信息/Info

Title:
Research on SR latch circuit based on interconnected coupling capacitor
作者:
赵志伟1 张跃军12* 李 林1
1.宁波大学 信息科学与工程学院, 浙江 宁波 315211; 2.密码科学技术国家重点实验室, 北京 100878
Author(s):
ZHAO Zhiwei1 ZHANG Yuejun12* LI Lin1
1.Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo 315211, China; 2.State Key Laboratory of Cryptology, Beijing 100878, China
关键词:
或非门 SR锁存电路 线电容耦合 电路设计
Keywords:
NOR gate SR latch circuit interconnected capacitance coupling circuit design
分类号:
TP332
DOI:
-
文献标志码:
A
摘要:
通过对线间电容耦合模型的研究, 提出了一种基于互连线电容耦合的SR锁存电路设计方案. 该方案首先分析互连线间电容耦合关系, 利用MOS管栅极电容模拟互连线电容; 然后利用电容耦合结构与线计算特性, 设计或非逻辑门电路, 在此基础上实现基于互连线电容耦合的SR锁存电路; 最后在TSMC 65nm Spectre环境下仿真验证. 结果表明 所设计的电路逻辑功能正 确, 且具有低硬件开销特性.
Abstract:
With the on-going improvement of integrated circuit technology, there are more and more resources with the on-chip interconnection. By studying the capacitive coupling model between lines, in this paper a design scheme of SR latch circuit is proposed based on interconnected capacitance coupling. Capacitance coupling relationship between interconnected lines is established using MOS gate capacitance to simulate interconnected capacitance, and then using capacitive coupling structure and line calculation characteristics. Through designing or NOR gate, SR is implemented based on interconnected capacitance coupling latch circuit. Finally, the simulation is conducted to verify the proposed design in the TSMC 65nm Spectre environment. The results show that the designed circuit logic function is valid and has low hardware overheads.

参考文献/References:

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备注/Memo

备注/Memo:
收稿日期:2019-09-19.宁波大学学报(理工版)网址:http://journallg.nbu.edu.cn/
基金项目:国家自然科学基金(61871244,61874078);浙江省自然科学基金(LY18F040002);国家重点实验室开放课题(MMKFKT20187);专用集成电路与系统国家重点实验室开放研究课题(2019KF002);宁波大学研究生科研创新项目.
第一作者:赵志伟(1995-),男,江苏宿迁人,在读硕士研究生,主要研究方向:全定制集成电路设计.E-mail:1186053330@qq.com
*通信作者:张跃军(1982-),男,浙江宁波人,博士/副教授,主要研究方向:安全芯片理论和设计等.E-mail:zhangyuejun@nbu.edu.cn
更新日期/Last Update: 2020-05-06